1. Field of the Invention
This invention relates to a low dielectric constant insulating material to be used as an interlayer insulating film for multilayer interconnection in an integrated circuit and a semiconductor device using the material.
2. Description of the Prior Art
The demand for further integration of ultra large-scale integrated (ULSI) circuits has been continuing to mount. This high integration requires the electric wires to be disposed densely by narrowing the intervals between the adjacent electric wires and also requires the electric wires to thin and fit multilayer disposition. It is known that this high integration results in adding to the distance of wiring. The high integration, therefore, results in augmenting the distribution resistance and the parasitic capacity and induces a delay of signal that lowers the processing speed of ULSI. Thus, the solution of these defects constitutes an important task.
For the sake of suppressing the increase of such signal delay in the wirings, the introduction of a low resistance wiring material and a low dielectric constant interlayer insulating material is indispensable from the viewpoint of material and processing technique. The feasibility of the Cu wirings having lower resistance than the conventional aluminum (Al) wirings and various interlayer insulating films using a low dielectric constant material has been being studied. They partly have been already reduced to practical use.
In the case of microprocessor units (MPU), the roadmap for wiring technique which is inserted in Non-Patent Document 1 (ITRS2002: International Technology Roadmap for Semiconductors 2002 Edition, 2002 Semiconductor Industry Association) has a description to the effect that the effective dielectric constant which indicates the relative dielectric constant of the whole wiring layers in a design room of 65 nm is required to fall in the range of 2.3 to 2.7. This indicates that even an interlayer insulating as a simple unit requires a material of low relative dielectric constant.
For an interlayer insulating film, silicon dioxide (SiO2) that can be stacked at a temperature in the range of 200 to 350° C. and formed by plasma CVD has been used hitherto. It has as high a relative dielectric constant as about 4. A fluorine atom (F), when introduced into SiO2, lowers the dielectric constant of SiO2. Thus, the SiO2 that has introduced a fluorine atom has been introduced for practical use. The dielectric constant of SiO2 decreases, depending on the amount of fluorine atom introduced therein. The hygroscopicity of the insulating film increases when the fluorine content exceeds 20%. Since the SiO2, therefore, is not allowed to contain fluorine atom in an amount exceeding 20%, the dielectric constant is lowered only to the degree of 3.
Further, it has been known that the dielectric constant of SiO2 is lowered when the density thereof is lowered. The study on the SiO2 of lowered density (porous silica, porous SiO2) is being pursued energetically. For the porous SiO2, the practice of decreasing the density of SiO2 by introducing voids therein has been in vogue. Thus, the porous SiO2 has a conspicuously low mechanical strength as compared with the bulk SiO2 and is fragile. When the formation of electric wires of Cu is tried by the so-called damascene process at the next step, these electric wires do not withstand the process of chemical mechanical polish (CMP) which is performed with the object of removing the excess of the Cu coat formed uniformly by the electrolytic plating, with the result that they peel or sustain a crack. Thus, the process incurs the solution of such defects as a problem.
The decrease of the dielectric constant of SiO2 may be sought by introducing an organic group containing a carbon atom therein. When a methyl group (CH3—) is introduced, for example, the dielectric constant is decreased, depending on the content of the methyl group. One version of this method that uses as a raw material an organic silane having a high vapor pressure and molds a film of this organic silane by plasma CVD and a low dielectric constant insulating film consequently obtained have already been proposed for practical use. The feasibility of another version of the method which forms an organic group-containing SiO2 by using a liquid raw material containing an organic group, depositing this raw material on the surface of a substrate by the coating technique, and subjecting the resultant coated substrate to a heat treatment is now being studied. When the produced film manifests improved reliability, this version may be possibly put to practical use. Further, the method for molding an organic polymer material on the substrate by the coating technique now forms a subject of an active project of research and development directed at a low dielectric constant interlayer insulating material.
The low dielectric constant interlayer insulating film, as described in detail above, encloses numerous voids, contains an organic group and consists of an organic film. When the dry etching step is tried to mold this film in an expected wire pattern, this operation requires an insulating layer called “a hard mask.”
Concerning the term “hard mask,” when the object of patterning a film is realized by using a material manifesting a large selective ratio during dry etching to the film expected to have the pattern transferred thereto, causing a shaped pattern transferred to a resist to be tentatively transferred to a film called a “hard mask” and using the pattern so transferred to the hard mark as a mask, the material which is formed on the top surface of the target film is referred to as a “hard mask.” SiO2, Si3N4, SiC, SiON, etc. have hitherto been used for it. These materials have high relative dielectric constants in the range of 4.5 to 7 and have the problem of exalting the effective relative dielectric constants of respective insulating films for multilayer interconnection.
The hard mask is necessary for several reasons. The first reason is that owing to the necessity for transferring increasingly fine patterns in the future, the thickness of the film of resist will generally tend to decrease in accordance as the exposure wavelength decreases and consequently the focal depth decreases as well. This reason does not originate in the use of a low dielectric constant interlayer insulating film. It resides in the fact that since the thickness of the film of resist decreases in reality, the resist vanishes in the midst of dry etching and the necessary transfer of a pattern is not realized.
As the second reason, the fact that the low dielectric constant material, while being dry-etched, does not acquire a selection ratio relative to the resist and therefore necessitates a hard mask is cited. The porous SiO2 incorporates therein voids (porosity) for the purpose of lowering density as described above. Thus, the porous SiO2 is generally brittle and vulnerable to ion impact and, therefore, encounters difficulty in forming trenches and holes in expected shapes. An organic group-containing SiO2 does not withstand a dry etching process using ordinary perfluorocarbon (PFC) as an etching gas when the resist used in the form of film vanishes because it contain an organic group. For this reason, the organic group-containing SiO2 also requires a hard mask and an etching stopper. The organic polymer low dielectric constant materials require a hard mask because they possess compositions resembling relevant resists and fail to manifest selection ratios during dry etching to the resists.
As low resistance materials, copper (Cu) wirings have been being developed for practical use. The Cu atoms are liable to diffuse and drift in the insulating film of SiO2, for example. Further, Cu is easily oxidized. When Cu is used as a wiring material for the LSI, therefore, the wiring material necessitates a layer for inhibiting diffusion of Cu (barrier layer) and requires devising a process for precluding oxidation. For the Cu barrier layer, silicon carbide (SiC), silicon nitride (Si3N4), silicon oxidonitride (SiON), etc. have hitherto been used. These materials, however, have high relative dielectric constants and add to the effective dielectric constant of an interlayer insulating film for multilayer interconnection.
As the exposure wavelength has decreased as described above, the focal depth has decreased and the flatness of the surface of a substrate for transfer had gained in importance. The metallic Cu allows no easy dry etching and, therefore, the feasibility of fine interconnection with the metallic Cu has been hitherto regarded as difficult.
As a process for interconnection that solves these two problems, a method called a “damascene process” has been being developed for practical use. The damascene process first forms an interlayer insulating film and then forms trenches or holes in regions for distributing electric wires by using the ordinary technique of exposure to light and the dry etching technique as well. When the interlayer connecting holes and the wirings are formed by the application of the damascene process in an interlayer insulating film, since the wirings are disposed on the interlayer connecting holes, the wiring parts in the uppermost part of the interlayer insulating film are removed by etching and the parts of the interlayer connecting holes in the lowermost part thereof are removed. Then, a Cu barrier metal and a thin Cu layer (seed Cu film) are formed by the sputtering technique on the entire surface of a substrate. A Cu film is deposited by the electrolytic plating using the Cu layer as an electrode to bury the trenches and the holes. Thereafter, the chemical mechanical polish (CMP) process is used to remove the Cu extrusions from the trenches and the holes, and a flat surface is formed simultaneously.
The damascene process is broadly divided into two methods of production. One of these methods is called a “single damascene process” which makes the individual interconnecting layers and the interlayer connecting holes for vertically connecting the interconnecting layers by different procedures. Since the single damascene process continues to make the interconnecting layers and the interlayer connecting holes separately, it has a strong point of infallibly making them and a weak point of adding to the length of process and tending to add to the cost. The other method makes the interlayer connecting holes and the upper interconnecting layer simultaneously on the lower interconnecting layer. It is called a “dual damascene process.” As compared with the single damascene process, the dual damascene process has a strong point of simplifying a process and suppressing the rise of cost and a weak point of exalting the difficulty of the dry etching technique because of the necessity for opening the holes (VIA holes) for the interlayer connecting holes while retaining the shapes of the trenches for the wirings. This method further suffers the technical difficulty of process to mount because of the necessity for depositing barrier films for Cu diffusion and seed Cu films without sacrificing reliability on the trenches and the via holes which are destined to have higher aspect ratios.
The damascene process necessitates mechanically, chemically stable electroconductive films, such as insulating films and Cu films, because it has the CMP method as an indispensable step.
As for the interlayer insulating film, Patent Document 1 (Japanese Patent No. 2968244) discloses a method which comprises adding the solution of (HSi(OH)xO3-x/2)n and at least one material selected from the group consisting of phosphagens, fluorophosphagens, borazines and mixtures thereof together and applying the resultant mixture to a substrate, thereby forming a layer.
Though the insulating film obtained by this method excels in the flatness of the buried trenches, the publication of the patent discloses nothing about the dielectric constant. It has no mention whatever about borazine compounds. The materials contemplated thereby differ from those of the present invention.
Then, Patent Document 2 (JP-A 2002-317049) discloses a boron-containing polymer composition which is characterized by containing a borazine compound and a polymer obtained from a compound represented by the general formula R1mSi(OR2)n (wherein R1 denotes a hydrogen atom, an alkyl group, a vinyl group or an alkyl group possessing a functional group, n denotes an integer of than 3 or more, m denotes an integer of than 0 or more, and m+n=4), and/or a hydrolytic condensate.
It, however, discloses nothing whatever about tripropinyl compounds which constitute one of the characteristics of the present invention and which will be described specifically herein below. The Si-containing material contemplated by the publication of this patent also differs from that of the present invention.
The material which contains a six-member borazine ring comprising boron and nitrogen elements has been known to excel in electrical properties, such as a low relative dielectric constant and a low leak current, mechanical properties, such as modulus of elasticity and hardness, and thermal properties, such as resistance to heat and thermal conductivity and to be suitable for interlayer insulating materials.
As the material containing a borazine ring, borazine-silicon polymers that are organic and inorganic hybrid polymer materials are available. These polymers are obtained by the polymerization of hydrosilylation of a borazine compound having a triple bond-containing substituent bound to the boron atom of a borazine ring and a hydroxyl group-containing silane compound or siloxane compound.
To be specific, by the reaction of a trifunctional borazine compound having a triple-bond ethynyl group bound to the boron atom of borazine with a hydrosilane or a siloxane possessing two or more hydrogen atoms bound to a silicone atom (SiH), polycarbosilane or polysiloxane having a borazine ring and the moiety of silicon compound containing a silane bond or a siloxane bond alternately arranged through an organic molecular chain can be obtained.
Patent Document 3 (Japanese Patent No. 3041424), for example, describes in detail a carbosilane borazine polymer and a method for the production thereof.
Patent Document 4 (JP-A 2002-359240) describes an interlayer insulating film formed of a low dielectric constant borazine-silicon polymer and a semiconductor device formed of the film.
A polymer solution is obtained, for example, by performing the hydrosilylating polymerization using B,B,B-triethynyl-N,N,N-trimethyl borazine and 1,3,5,7-tetramethylcyclo-tetrasiloxane which is a cyclic siloxane in the presence of a platinum catalyst, Pt2(dvs)3 (wherein dvs denotes 1,3-divinyl (1,1,3,3-tetramethyl-1,3-disiloxane). The Patent Document has a disclosure to the effect that a polymer film of a network configuration is obtained by applying this polymer of a linear configuration to a wafer by spin coating and heat-treating the resultant coated wafer in the atmosphere of nitrogen (N2) or argon (Ar) at a temperature in the range of 200 to 400° C.
The polymer thus obtained has been found to possess excellent electrical properties, mechanical properties and thermal properties as evinced by a relative dielectric constant of 2.76, a modulus of elasticity of 14.6 GPa, a hardness of 10 GPa and a temperature for 5% weight loss by heating of 564° C., for example.
Patent Document 5 (JP-A 2003-119289) discloses a method for producing a low dielectric constant material by heat-treating a material having a borazine skeleton configuration contained in the molecule of an inorganic or organic material, a low dielectric constant material and a semiconductor device incorporating the material therein.
Materials containing a borazine skeleton configuration, however, have been disclosed in detail in Patent Document 1, Patent Document 3, etc. From the specification of Patent Document 5, it is clear that the invention disclosed therein is aimed mainly at producing a polymer by forming N—B (N and B denote respectively a nitrogen atom and a boron atom constituting separate borazine skeleton configurations), B—C (B and C denote respectively a boron atom and a carbon atom constituting a borazine skeleton configuration and a benzene ring) and B—NX—B (two B's denote boron atoms constituting separate borazine skeleton configurations, N denotes a nitrogen atom binding these two borazine skeleton configurations and X denotes a hydrogen atom or an alkyl group) and linking the borazine skeleton configurations. Thus, it is plain that the disclosure of Patent Document 5 differs in gist from the disclosure of the present invention.
In Patent Document 5, however, O—B (wherein B denotes a boron atom constituting a borazine skeleton configuration and O denotes an oxygen atom joining two borazine skeleton configurations) (refer to FIG. 40 of Patent Document 5), S—B (wherein B denotes a boron atom constituting a borazine skeleton configuration and S denotes a sulfur atom joining two borazine skeleton configurations) (refer to FIG. 41 thereof), N—SiH2 (wherein N denotes a nitrogen atom constituting a borazine skeleton configuration and SiH2 denotes a chemical species joining two borazine skeleton configurations) (refer to FIG. 42 thereof), N—Si(OCH3)2 (wherein N denotes a nitrogen atom constituting a borazine skeleton configuration and Si(OCH3)2 denotes a chemical species joining two borazine skeleton configurations) (refer to FIG. 43 thereof) and B—PH (wherein B denotes a boron atom constituting a borazine skeleton configuration and PH denotes a chemical species joining two borazine skeleton configurations) (refer to FIG. 44 thereof) appear to be chemical species other than B and N.
The atoms or chemical species other than B and N that join these borazine skeleton configurations, however, have been originally bound to the borazine skeleton configurations. Thus, they are materials of the type different totally from the materials contemplated by the present invention.
The attempt carried out hitherto to use a low dielectric constant interlayer insulating film or Cu wiring in the ULSI multilayer interconnection has brought such problems as necessitating use of a hard mask, a barrier layer against Cu diffusion or an additional film called an etching stopper, i.e. a material possessing a high relative dielectric constant and suffering the effective relative dielectric constant of the interconnection to increase in spite of the use of a low dielectric constant interlayer insulating film having a low relative dielectric constant.
This invention is directed toward solving the problems attendant on the use of such a conventional low dielectric constant interlayer insulating film or Cu wiring in the ULSI multilayer interconnection and is aimed at preventing the exaltation of the degree of integration from adding to the effective relative dielectric constant of the multilayer interconnection by the use of a low dielectric constant interlayer insulating film.